What is a logical qubit?

Physical qubits are noisy. The best two-qubit gate error rate ever demonstrated is 0.0003 (0.03%, on trapped-ion hardware, July 2024), which sounds excellent until you multiply it out: errors compound with every operation, so an uncorrected computation loses its result after on the order of 3,000 operations even at that record rate. Useful algorithms need billions to trillions of operations, a gap that no foreseeable improvement in raw hardware fidelity closes on its own.

Error correction closes it structurally instead: encode one qubit's worth of information across many physical qubits, repeatedly measure carefully chosen parity checks whose outcomes (the syndromes) reveal errors without disturbing the encoded state, and correct as you go. The encoded entity, the thing your algorithm actually operates on, is the logical qubit.

Encoding only helps if the physical error rate is below the code's threshold; above it, adding more qubits adds more errors than the code removes. The standard surface code's threshold is about 1.4% (a depolarizing-noise figure; circuit-level estimates are lower); the leading qLDPC code's break-even point, its pseudo-threshold, is 0.58% under circuit-level noise, so the two figures come from different noise models and are not directly comparable. All 3 tracked platforms are now below the surface-code threshold on record gates; the bottleneck has shifted from demonstrating sufficient fidelity to sustaining it across a full device at scale.

Below threshold, reliability is bought with size: increasing the code distance d suppresses the logical error rate exponentially while the qubit cost grows only quadratically. A distance-d surface-code patch uses 2d² − 1 qubits (d² data plus d² − 1 measurement), and the surface-code cost figures below additionally include this site's ×3 routing multiplier. That exchange rate, exponential protection for polynomial overhead, is the entire economic case for quantum error correction.

The overhead depends on the code and on how much suppression the algorithm needs (deeper computations need larger distances). Representative figures from this site's model, computed from the primary papers. One asymmetry to read them with: the surface-code figures include the ×3 routing multiplier, the qLDPC figure does not, so the cross-code comparison is tilted up to ~3× in the qLDPC direction. The Gross code's figures are numerically established in the source paper; the code has not yet been operated on hardware.

Dividing the record device's 1,180 physical qubits by the most efficient published overhead gives a hosting capacity of at most ~37 logical qubits. That is an optimistic upper bound, not a demonstrated capability: it assumes every qubit on the device could run the code at sufficient fidelity, and operating logical qubits, with repeated correction cycles, below-break-even error rates, and joint logical operations, is a substantially harder demonstration than hosting them. Published demonstrations reporting larger logical-qubit counts use looser criteria than that, for example error detection with postselection rather than repeated in-run correction; hosting capacity and demonstrated operation answer different questions. For scale: RSA-2048 needs 1,399 logical qubits running 6.5×10⁹ Toffoli Gates.

The practical reading: physical-qubit headlines and logical-qubit requirements differ by two to three orders of magnitude of error-correction overhead. When a system's qubit count and an algorithm's qubit requirement are compared, the first number is almost always physical and the second logical, and the comparison is meaningless until both are converted to the same unit.